lscpu: regression tests
This patch added regression tests for lscpu. It tests lscpu for 3 architecutres, i386, x86_64 and ia64, with data from 3 different machines each. Signed-off-by: Cai Qian <qcai@redhat.com> Signed-off-by: Karel Zak <kzak@redhat.com>
This commit is contained in:
parent
928e9f327f
commit
c2abd9a0a5
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@ -39,6 +39,7 @@ TS_CMD_CHECKTTY=${TS_CMD_CHECKTTY-"$TOPDIR/login-utils/checktty_test"}
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TS_CMD_ISLOCAL=${TS_CMD_ISLOCAL-"$TOPDIR/login-utils/islocal_test"}
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TS_CMD_HWCLOCK=${TS_CMD_HWCLOCK-"$TOPDIR/hwclock/hwclock"}
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TS_CMD_LSCPU=${TS_CMD_LSCPU-"$TOPDIR/sys-utils/lscpu"}
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@ -0,0 +1,27 @@
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CPU(s): 8
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Thread(s) per core: 1
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Core(s) per socket: 4
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CPU socket(s): 2
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Vendor ID: AuthenticAMD
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CPU family: 16
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Model: 4
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Stepping: 0
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CPU MHz: 1995.158
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Virtualization: AMD-V
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L1d cache: 512K
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L1i cache: 512K
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L2 cache: 512K
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L3 cache: 6144K
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
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0,0,0,,,0,0,0,0
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1,1,0,,,1,1,1,1
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2,2,0,,,2,2,2,2
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3,3,0,,,3,3,3,3
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4,4,1,,,4,4,4,4
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5,5,1,,,5,5,5,5
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6,6,1,,,6,6,6,6
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7,7,1,,,7,7,7,7
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@ -0,0 +1,16 @@
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CPU(s): 2
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Thread(s) per core: 2
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Core(s) per socket: 1
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CPU socket(s): 1
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Vendor ID: GenuineIntel
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CPU family: 15
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Model: 2
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Stepping: 9
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CPU MHz: 3391.773
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node
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0,0,0,
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1,0,0,
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@ -0,0 +1,26 @@
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CPU(s): 8
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Thread(s) per core: 1
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Core(s) per socket: 4
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CPU socket(s): 2
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Vendor ID: GenuineIntel
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CPU family: 6
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Model: 15
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Stepping: 7
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CPU MHz: 1596.044
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Virtualization: VT-x
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L1d cache: 32K
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L1i cache: 32K
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L2 cache: 4096K
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2
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0,0,0,,,0,0,0
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1,1,0,,,1,1,0
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2,2,0,,,2,2,1
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3,3,0,,,3,3,1
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4,4,1,,,4,4,2
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5,5,1,,,5,5,2
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6,6,1,,,6,6,3
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7,7,1,,,7,7,3
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@ -0,0 +1,26 @@
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CPU(s): 8
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Thread(s) per core: 1
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Core(s) per socket: 1
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CPU socket(s): 8
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NUMA node(s): 3
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Vendor ID: GenuineIntel
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CPU family: Itanium 2
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Model: 1
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CPU MHz: 1300.000000
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L1d cache: 16K
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L1i cache: 16K
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L2 cache: 256K
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L3 cache: 3072K
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
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0,0,0,0,,0,0,0,0
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1,1,1,0,,1,1,1,1
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2,2,2,0,,2,2,2,2
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3,3,3,0,,3,3,3,3
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4,4,4,1,,4,4,4,4
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5,5,5,1,,5,5,5,5
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6,6,6,1,,6,6,6,6
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7,7,7,1,,7,7,7,7
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@ -0,0 +1,20 @@
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CPU(s): 2
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Thread(s) per core: 1
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Core(s) per socket: 1
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CPU socket(s): 2
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NUMA node(s): 1
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Vendor ID: GenuineIntel
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CPU family: Itanium 2
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Model: 2
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CPU MHz: 1599.000967
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L1d cache: 16K
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L1i cache: 16K
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L2 cache: 256K
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L3 cache: 3072K
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
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0,0,0,0,,0,0,0,0
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1,1,1,0,,1,1,1,1
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@ -0,0 +1,35 @@
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CPU(s): 16
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Thread(s) per core: 1
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Core(s) per socket: 2
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CPU socket(s): 8
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NUMA node(s): 2
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Vendor ID: GenuineIntel
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CPU family: Itanium 2
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Model: 0
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CPU MHz: 1418.000227
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L1d cache: 16K
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L1i cache: 16K
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L2d cache: 256K
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L2i cache: 1024K
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L3 cache: 6144K
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2d,L2i,L3
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0,0,0,0,,0,0,0,0,0
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1,1,0,0,,1,1,1,0,0
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2,2,1,0,,2,2,2,1,1
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3,3,1,0,,3,3,3,1,1
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4,4,2,0,,4,4,4,2,2
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5,5,2,0,,5,5,5,2,2
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6,6,3,0,,6,6,6,3,3
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7,7,3,0,,7,7,7,3,3
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8,8,4,1,,8,8,8,4,4
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9,9,4,1,,9,9,9,4,4
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10,10,5,1,,10,10,10,5,5
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11,11,5,1,,11,11,11,5,5
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12,12,6,1,,12,12,12,6,6
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13,13,6,1,,13,13,13,6,6
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14,14,7,1,,14,14,14,7,7
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15,15,7,1,,15,15,15,7,7
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@ -0,0 +1,36 @@
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CPU(s): 16
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Thread(s) per core: 1
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Core(s) per socket: 4
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CPU socket(s): 4
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NUMA node(s): 4
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Vendor ID: AuthenticAMD
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CPU family: 16
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Model: 2
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Stepping: 3
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CPU MHz: 2210.188
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Virtualization: AMD-V
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L1d cache: 512K
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L1i cache: 512K
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L2 cache: 512K
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L3 cache: 2048K
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
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0,0,0,0,,0,0,0,0
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1,1,0,0,,1,1,1,1
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2,2,0,0,,2,2,2,2
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3,3,0,0,,3,3,3,3
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4,4,1,1,,4,4,4,4
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5,5,1,1,,5,5,5,5
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6,6,1,1,,6,6,6,6
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7,7,1,1,,7,7,7,7
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8,8,2,2,,8,8,8,8
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9,9,2,2,,9,9,9,9
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10,10,2,2,,10,10,10,10
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11,11,2,2,,11,11,11,11
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12,12,3,3,,12,12,12,12
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13,13,3,3,,13,13,13,13
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14,14,3,3,,14,14,14,14
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15,15,3,3,,15,15,15,15
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@ -0,0 +1,20 @@
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CPU(s): 2
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Thread(s) per core: 1
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Core(s) per socket: 2
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CPU socket(s): 1
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NUMA node(s): 1
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Vendor ID: AuthenticAMD
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CPU family: 15
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Model: 33
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Stepping: 2
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CPU MHz: 1995.058
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L1d cache: 1024K
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L1i cache: 1024K
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L2 cache: 1024K
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2
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0,0,0,0,,0,0,0
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1,1,0,0,,1,1,1
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@ -0,0 +1,19 @@
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CPU(s): 2
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Thread(s) per core: 2
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Core(s) per socket: 1
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CPU socket(s): 1
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NUMA node(s): 1
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Vendor ID: GenuineIntel
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CPU family: 15
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Model: 4
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Stepping: 3
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CPU MHz: 3790.599
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L1d cache: 16K
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L2 cache: 2048K
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting from zero.
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# CPU,Core,Socket,Node,,L1d,L2
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0,0,0,0,,0,0
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1,0,0,0,,0,0
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@ -0,0 +1,184 @@
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processor : 0
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vendor_id : AuthenticAMD
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cpu family : 16
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model : 4
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model name : AMD Engineering Sample
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stepping : 0
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cpu MHz : 1995.158
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cache size : 512 KB
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physical id : 0
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siblings : 4
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core id : 0
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cpu cores : 4
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fdiv_bug : no
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hlt_bug : no
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f00f_bug : no
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coma_bug : no
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fpu : yes
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fpu_exception : yes
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cpuid level : 5
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc pni cx16 popcnt lahf_lm cmp_legacy svm extapic cr8legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ts ttp tm stc 100mhzsteps hwpstate [8]
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bogomips : 3992.50
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processor : 1
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vendor_id : AuthenticAMD
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cpu family : 16
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model : 4
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model name : AMD Engineering Sample
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stepping : 0
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cpu MHz : 1995.158
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cache size : 512 KB
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physical id : 0
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siblings : 4
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core id : 1
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cpu cores : 4
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fdiv_bug : no
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hlt_bug : no
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f00f_bug : no
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coma_bug : no
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fpu : yes
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fpu_exception : yes
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cpuid level : 5
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc pni cx16 popcnt lahf_lm cmp_legacy svm extapic cr8legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ts ttp tm stc 100mhzsteps hwpstate [8]
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bogomips : 3991.05
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processor : 2
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vendor_id : AuthenticAMD
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cpu family : 16
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model : 4
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model name : AMD Engineering Sample
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stepping : 0
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cpu MHz : 1995.158
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cache size : 512 KB
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physical id : 0
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siblings : 4
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core id : 2
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cpu cores : 4
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fdiv_bug : no
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hlt_bug : no
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f00f_bug : no
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coma_bug : no
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fpu : yes
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fpu_exception : yes
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cpuid level : 5
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc pni cx16 popcnt lahf_lm cmp_legacy svm extapic cr8legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ts ttp tm stc 100mhzsteps hwpstate [8]
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bogomips : 3993.85
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processor : 3
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vendor_id : AuthenticAMD
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cpu family : 16
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model : 4
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model name : AMD Engineering Sample
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stepping : 0
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cpu MHz : 1995.158
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cache size : 512 KB
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physical id : 0
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siblings : 4
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core id : 3
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cpu cores : 4
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fdiv_bug : no
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hlt_bug : no
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f00f_bug : no
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coma_bug : no
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fpu : yes
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fpu_exception : yes
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cpuid level : 5
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc pni cx16 popcnt lahf_lm cmp_legacy svm extapic cr8legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ts ttp tm stc 100mhzsteps hwpstate [8]
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bogomips : 3993.27
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processor : 4
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vendor_id : AuthenticAMD
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cpu family : 16
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model : 4
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model name : AMD Engineering Sample
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stepping : 0
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cpu MHz : 1995.158
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cache size : 512 KB
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physical id : 1
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siblings : 4
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core id : 0
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cpu cores : 4
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fdiv_bug : no
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hlt_bug : no
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f00f_bug : no
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coma_bug : no
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fpu : yes
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fpu_exception : yes
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cpuid level : 5
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wp : yes
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flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc pni cx16 popcnt lahf_lm cmp_legacy svm extapic cr8legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ts ttp tm stc 100mhzsteps hwpstate [8]
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bogomips : 3990.03
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processor : 5
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vendor_id : AuthenticAMD
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cpu family : 16
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model : 4
|
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model name : AMD Engineering Sample
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stepping : 0
|
||||
cpu MHz : 1995.158
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cache size : 512 KB
|
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physical id : 1
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||||
siblings : 4
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core id : 1
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||||
cpu cores : 4
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fdiv_bug : no
|
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hlt_bug : no
|
||||
f00f_bug : no
|
||||
coma_bug : no
|
||||
fpu : yes
|
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fpu_exception : yes
|
||||
cpuid level : 5
|
||||
wp : yes
|
||||
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc pni cx16 popcnt lahf_lm cmp_legacy svm extapic cr8legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ts ttp tm stc 100mhzsteps hwpstate [8]
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bogomips : 3990.09
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||||
|
||||
processor : 6
|
||||
vendor_id : AuthenticAMD
|
||||
cpu family : 16
|
||||
model : 4
|
||||
model name : AMD Engineering Sample
|
||||
stepping : 0
|
||||
cpu MHz : 1995.158
|
||||
cache size : 512 KB
|
||||
physical id : 1
|
||||
siblings : 4
|
||||
core id : 2
|
||||
cpu cores : 4
|
||||
fdiv_bug : no
|
||||
hlt_bug : no
|
||||
f00f_bug : no
|
||||
coma_bug : no
|
||||
fpu : yes
|
||||
fpu_exception : yes
|
||||
cpuid level : 5
|
||||
wp : yes
|
||||
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc pni cx16 popcnt lahf_lm cmp_legacy svm extapic cr8legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ts ttp tm stc 100mhzsteps hwpstate [8]
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||||
bogomips : 3990.04
|
||||
|
||||
processor : 7
|
||||
vendor_id : AuthenticAMD
|
||||
cpu family : 16
|
||||
model : 4
|
||||
model name : AMD Engineering Sample
|
||||
stepping : 0
|
||||
cpu MHz : 1995.158
|
||||
cache size : 512 KB
|
||||
physical id : 1
|
||||
siblings : 4
|
||||
core id : 3
|
||||
cpu cores : 4
|
||||
fdiv_bug : no
|
||||
hlt_bug : no
|
||||
f00f_bug : no
|
||||
coma_bug : no
|
||||
fpu : yes
|
||||
fpu_exception : yes
|
||||
cpuid level : 5
|
||||
wp : yes
|
||||
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc pni cx16 popcnt lahf_lm cmp_legacy svm extapic cr8legacy abm sse4a misalignsse 3dnowprefetch osvw ibs ts ttp tm stc 100mhzsteps hwpstate [8]
|
||||
bogomips : 3989.99
|
||||
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index0/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index0/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000001
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index0/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index0/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index0/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index0/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Data
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index1/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index1/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000001
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index1/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index1/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index1/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index1/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Instruction
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index2/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index2/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
2
|
|
@ -0,0 +1 @@
|
|||
00000001
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index2/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index2/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index2/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index2/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index3/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index3/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
3
|
|
@ -0,0 +1 @@
|
|||
00000001
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index3/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index3/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
6144K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index3/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu0/cache/index3/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
|
@ -0,0 +1 @@
|
|||
0000000f
|
|
@ -0,0 +1 @@
|
|||
00000001
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index0/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index0/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000002
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index0/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index0/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index0/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index0/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Data
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index1/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index1/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000002
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index1/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index1/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index1/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index1/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Instruction
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index2/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index2/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
2
|
|
@ -0,0 +1 @@
|
|||
00000002
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index2/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index2/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index2/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index2/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index3/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index3/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
3
|
|
@ -0,0 +1 @@
|
|||
00000002
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index3/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index3/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
6144K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index3/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu1/cache/index3/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
|
@ -0,0 +1 @@
|
|||
0000000f
|
|
@ -0,0 +1 @@
|
|||
00000002
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index0/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index0/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000004
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index0/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index0/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index0/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index0/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Data
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index1/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index1/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000004
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index1/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index1/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index1/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index1/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Instruction
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index2/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index2/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
2
|
|
@ -0,0 +1 @@
|
|||
00000004
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index2/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index2/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index2/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index2/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index3/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index3/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
3
|
|
@ -0,0 +1 @@
|
|||
00000004
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index3/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index3/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
6144K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index3/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu2/cache/index3/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
|
@ -0,0 +1 @@
|
|||
0000000f
|
|
@ -0,0 +1 @@
|
|||
00000004
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index0/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index0/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000008
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index0/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index0/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index0/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index0/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Data
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index1/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index1/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000008
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index1/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index1/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index1/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index1/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Instruction
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index2/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index2/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
2
|
|
@ -0,0 +1 @@
|
|||
00000008
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index2/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index2/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index2/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index2/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index3/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index3/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
3
|
|
@ -0,0 +1 @@
|
|||
00000008
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index3/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index3/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
6144K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index3/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu3/cache/index3/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
|
@ -0,0 +1 @@
|
|||
0000000f
|
|
@ -0,0 +1 @@
|
|||
00000008
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index0/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index0/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000010
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index0/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index0/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index0/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index0/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Data
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index1/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index1/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
1
|
|
@ -0,0 +1 @@
|
|||
00000010
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index1/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index1/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index1/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index1/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Instruction
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index2/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index2/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
2
|
|
@ -0,0 +1 @@
|
|||
00000010
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index2/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index2/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
512K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index2/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index2/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index3/level
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index3/level
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
3
|
|
@ -0,0 +1 @@
|
|||
00000010
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index3/size
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index3/size
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
6144K
|
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index3/type
vendored
Normal file
1
tests/input/ts-lscpu-i386-amdshanghai/sys/devices/system/cpu/cpu4/cache/index3/type
vendored
Normal file
|
@ -0,0 +1 @@
|
|||
Unified
|
|
@ -0,0 +1 @@
|
|||
000000f0
|
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Reference in New Issue